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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-28314-2E
ASSP
3-Channel 10-Bit D/A Converter
MB40950
s DESCRIPTION
The MB40950 is a 10-bit resolution high-speed digital-to-analog converter, designed for video processing applications such as TVsets and VCRS. The MB40950 has 10-bit resolution 3 channels D/A converters. Digital data are input to the 10-bit digital input ports, and the input digital data are converted into the analog data in minimum 60 Mega sample per seconds (MSPS). The analog output voltage is provided in a range of DC +3V to +5V (2Vp-p level) . The MB40950 is fabricated by the Fujitsu's advanced bipolar process and housed in a 48-pin plastic QFP. The MB40950 is designed for video signal processing, and it is suitable for TVS and VCRS applications.
s FEATURES
* * * * * * 10-bit x 3 channels D/A converters Max. 60 MHz input clock frequency providing 60 MSPS data conversion rate Linearity error : Max. +/-0.07% Analog output voltage range : 3V to 5V (2Vp-p level) Digital input voltage level : TTL level On-chip reference voltage generator
(Continued)
s PACKAGE
48 pin, Plastic QFP
(FPT-48P-M15)
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
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MB40950
(Continued) * Low power consumption : - Typical 460mW at 2Vp-p analog output voltage - Typical 350mW at 1Vp-p analog output voltage * Single +5V power supply * Operating temperature range : -20C to +70C * Fujitsu's advanced bipolar process
* Package : 48-pin plastic QFP (Suffix : -PF)
s PIN ASSIGNMENT
D.GND VCCA
ROUT
VCCA
A.GND VCCA
BOUT
VROUT2 VRIN
A.GND
GOUT
A.GND
48
47
46
45
44
43
42
41
40
39
38
37 36 35 VROUT1 COMP VCCD B10 B9 B8 B7 B6 B5 B4 B3 B2
CLKR CLKG CLKB R1 R2 R3 R4 R5 R6 R7 R8 R9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 (TOP-VIEW) INDEX
34 33 32 31
(FPT-48P-M15)
30 29 28 27 26 25
R10 G1 G2
G3 G4
G5
G6 G7 G8
G9
G10 B1
2
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MB40950
s PIN DESCRIPTION
Symbol Power Supply VCCD D. GND VCCA A. GND Clock CLKR CLKG CLKB Digital Input R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 1 2 3 I I I Clock input pin for R channel. Clock input pin for G channel. Clock input pin for B channel. 34 48 41, 44, 47 39, 42, 45 -- -- -- -- +5V DC power supply pins for digital block. Ground pin for digital block. DC power supply pins for analog block. Ground pins for analog block. Pin No. Type Name & Function
I
Digital data input pins for R channel. 10-bit data is input to the pins. The R1 pin is the MSB and the R10 pin is the LSB.
I
Digital data input pins for G channel. 10-bit data is input to the pins. The G1 pin is the MSB and the G10 pin is the LSB.
I
Digital data input pins for B channel. 10-bit data is input to the pins. The B1 pin is the MSB and the B10 pin is the LSB.
(Continued)
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MB40950
(Continued)
Symbol Analog Output ROUT GOUT BOUT Reference Voltage Reference voltage input pin. This pin is used to set the analog output dynamic range. When the internal reference voltage is used, this pin is connected with VROUT1 pin (36 pin) or VROUT2 pin (38 pin). When the reference voltage is supplied from the external generator, 2.65V to 4.3V or VCCA - VRIN = 0.7V to 2.2V is input to this pin. Reference voltage output #1 pin. The output voltage is set to 0.6 x VCCA by the resistor divided method. When this pin is connected with VRIN pin (37 pin), an analog voltage is output from this pin in a range of 0.6 x VCCA to VCCA. Reference voltage output #2 pin. The output voltage is set to VCCA - 2V by the band-gap reference method. When this pin is connected with VRIN pin (37 pin), an analog voltage is output from this pin in a range of VCCA - 2V to VCCA. Phase compesation capacitor pin. A phase compesation capacitor of 0.1F or greater is connected between this pin and A. GND pin. 46 43 40 O O O Analog signal output pin for R channel. Analog signal output pin for G channel. Analog signal output pin for B channel. Pin No. Type Name & Function
VRIN
37
I
VROUT1
36
O
VROUT2
38
O
Compesation Capacitor COMP 35 -
4
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MB40950
s BLOCK DIAGRAM
CLKR (MSB) R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 (LSB) CLKG (MSB) G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 (LSB) CLKB (MSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 (LSB) BOUT GOUT ROUT
Input buffer
10
Master slave Flip-Flop
10
Buffer
10
Current switch
VCCA
Input buffer
10
Master slave Flip-Flop
10
Buffer
10
Current switch
VCCA
Input buffer
10
Master slave Flip-Flop
10
Buffer
10
Current switch
VCCA Reference resistor Amp. Reference voltage #1 0.6 x VCCA Reference voltage #2 VCCA - 2V
D. GND
A. GND
VROUT1
VROUT2
VRIN
COMP
VCCD
VCCA
5
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MB40950
s ABSOLUTE MAXIMUM RATINGS
(A. GND = D. GND = 0V) Parameter Power supply voltage Power supply voltage difference Analog reference voltage Digital input voltage Storage temperature Symbol VCCA, VCCD VCCD - VCCA VRIN VID Tstg Rating -0.5 to +7.0 1.5 -0.5 to VCCA +7.0 -0.5 to +7.0 -55 to +125 Unit V V V V C
Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
s RECOMMENDED OPERATING CONDITIONS
(A. GND = D. GND = 0V) Parameter Power supply voltage Power supply voltage difference Analog reference voltage Digital "H" level input voltage Digital "L" level input voltage Clock frequency Setup time Hold time Minimum clock "H" level pulse width Minimum clock "L" level pulse width Phase compesation capacitance Operating ambient temperature Symbol VCCA, VCCD VCCA - VCCD VCCA - VRIN VRIN VIHD VILD fCLK tSU th twH twL CCOMP TOP Value Min. 4.75 -0.2 0.70 2.65 2.0 -- -- 8.0 2.0 6.5 6.5 0.1 -20 Typ. 5.00 -- 2.00 3.00 -- -- -- -- -- -- -- -- -- Max. 5.25 0.2 2.20 4.30 -- 0.8 60 -- -- -- -- -- 70 Unit V V V V V V MHz ns ns ns ns F C
6
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MB40950
s ELECTRICAL CHARACTERISTICS (Recommended Operating Conditions Otherwise Noted)
1. DC Characteristics Parameter Resolution Linearity error Differential linearity error Digital "H" level input current Digital "L" level input current Reference input current Reference voltage (Resister divided) Reference voltage (BGR) Reference voltage (BGR) RGB output voltage ratio Full-scale output voltage Zero-scale output voltage Output resistance Supply current * : VCCA = VCCD = 5.00V Symbol -- LE DLE IIHD IILD IRIN VROUT1 VROUT2 -- FSR VOFS VOZS RO ICC Value Min. -- -- -- -- -100 -- 2.900 VCCA -2.100 -- 0 VCCA -20 2.932 192 -- Typ. -- -- -- -- -- -- 3.000 Max. 10 0.07 0.07 20 -- 10 3.100 Unit bit % % A A A V V ppm/C % mV V mA Remark -- DC Accuracy DC Accuracy VIHD = 2.7 (V) VILD = 0.4 (V) VRIN = 3.000 (V) VCCA = VCCD = 5.00 (V) -- -- VCCA = VCCD = 5.00 (V) -- VCCA = VCCD = 5.00 (V) VRIN = 3.000 (V) Ta = 25C VCCA = VCCD = 5.25 (V) VRIN = VROUT1
VCCA VCCA -2.000 -1.900 100 -- VCCA 3.002 240 92* -- 6 -- 3.072 288 152
2. AC Characteristics Parameter Maximum conversion rate Output propagation delay time Output rising time Output falling time Setting time Symbol FS tpd tr tf tset Value Min. 60 -- -- -- -- Typ. -- 7 5 5 17.5 Max. -- -- -- -- -- Unit MSPS ns ns ns ns Terminated A. OUT pin with 240, CL = 15pF Remark
7
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MB40950
s AC TIMING CHART
tsu th 3V Data Input
1.5V
0V
tWH Clock Input
tWL 3V
1.5V
0V
1/2 LSB
90% 50%
VOFS
Analog Output
10%
VOZS tr tpdLH tsetLH tpdHL tsetHL tf
1/2 LSB
s DAC OUTPUT VOLTAGE RANGE
Input R1 ~ 10 G1 ~ 10 B1 ~ 10 (VCCA) VOFS
Output ROUT GOUT BOUT
1023
5.000V 5.000V
0
VOZS (VRIN)
3.002V 3.000V 1LSB 2mV
8
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MB40950
s CALCULATION OF DAC OUTPUT VOLTAGE AT IDEAL CONVERSION
1023 - N ROUT (GOUT, BOUT) = VCCA - 1024 VOFS = VCCA VOZS = VCCA - 1023 1024 X ( VCCA - VRIN )
X ( VCCA - VRIN ) [ N : Digital Input Code (0 to 1023) ]
s TYPICAL CONNECTION EXAMPLE
5V
2.2H 2.2H
0.01F
47F
47F
0.01F
VCCD R 1 to 10 G1 to 10 B1 to 10 CLKR CLKG CLKB D. GND
VCCA ROUT GOUT BOUT VROUT2 VRIN VROUT1 COMP A. GND
Data Input
CLK Input
Connect to VROUT1, VROUT2, or external reference voltage source.
0.1F
s NOTES ON USE
1. Power Supply Patterns of the PCB The power supply wire patterns (VCC and GND patterns) of the PCB should be designed as wide as possible in order to reduce parasitic impedance. 2. Switching Noise In order to reduce switching noise as much as possible, noise limit capacitor must be connected between VCCD and D. GND pins and VCCA and A. GND pins. In this case, the capacitor should be connected to the GND pins side as near as possible.
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MB40950
s PACKAGE DIMENSION
48 pin, Plastic QFP (FPT-48P-M15)
15.300.40 SQ (.602.016) +0.30 12.00 -0.10 SQ +.012 .472 -.004 2.70(.106)MAX 0.05(.002)MIN (STAND OFF)
25
36
37
24
Details of "A" part 0.15(.006) 8.80 (.346) REF
13.600.40 (.535.016)
0.20(.008) 0.15(.006)MAX 0.50(.020)MAX
INDEX
48
"A"
13
Details of "B" part LEAD No.
1 12
0.80(.0315)TYP
0.300.06 (.012.002) "B"
0.16(.006)
M
0.15 -0.01 +.002 .006 -.0004 0.850.30 (.033.012)
+0.05
0~10
0.10(.004)
C
1994 FUJITSU LIMITED F48025S-1C-1
Dimensions in mm (inches).
10
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MB40950
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3753 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281 0770 Fax: (65) 281 0220
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
F9703 (c) FUJITSU LIMITED
Printed in Japan
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